1. Field of the Invention
This invention generally relates to methods and systems for processing a microelectronic topography and, more specifically, to methods and systems for preventing feature collapse subsequent to etching a sacrificial layer encasing the features.
2. Description of the Related Art
The following descriptions and examples are not admitted to be prior art by virtue of their inclusion within this section.
The fabrication of microelectronic topographies generally comprises a plurality of processing steps including but not limited to depositing, patterning, and etching materials to form a compilation of device structures. In some embodiments, conductive structures may be formed within a sacrificial layer of a microelectronic topography and then portions or all of the sacrificial layer may be subsequently removed, exposing the sidewalls of the conductive structures. Thereafter, the microelectronic topography may be rinsed with deionized water to remove the etching solution and/or byproducts and subsequently dried. In some cases, the rinsing and drying processes may cause the conductive structures to collapse (i.e., topple towards each other) rendering the microelectronic topography unusable. The occurrence of feature collapse appears to be increasing, particularly as width dimensions of structures continue to decrease and resulting aspect ratios increase with the ever pressing goal to increase processing speed memory density of integrated circuits. In particular, it appears that the width dimensions of conductive structures may, in some embodiments, be decreased to an extent that surface tension of water between the conductive structures causes the conductive structures to collapse during a drying process.
In effort to inhibit such damage, rinse solutions having lower surface tensions than deionized water have been used to rinse microelectronic topographies subsequent to an etch process. Although such a technique has been effective for some fabrication processes, the technique is susceptible to the same detriments as rinsing with deionized water. In particular, although the rinse solutions have lower surface tensions than deionized water, the solutions do possess some level of surface tension and, thus, are susceptible to causing feature collapse, particularly as width dimensions of features continue to decrease. In addition, some etch solutions and/or byproducts may not be as soluble in rinse solutions having lower surface tensions (i.e., as compared to deionized water) and, thus, such rinse solutions may not be as effective for removing residual etching matter. As such, an alternative technique often used for inhibiting feature collapse is to dry a microelectronic topography rinsed with deionized water in an environment of a supercritical fluid, since supercritical fluids are generally free of surface tension. Although such a technique has shown to reduce the occurrence of feature collapse, it has not proven to reliably eliminate it.
As such, it would be advantageous to develop methods and systems which reliably prevent feature collapse within a microelectronic topography while rinsing and drying device structures, particularly subsequent to etching a sacrificial layer encasing the structures.